1. Field of the Invention
The present invention relates to a plasma display panel, referred to hereinafter as a PDP, of matrix type.
2. Description of the Related Art
A PDP is a thin display device that is excellent in the visual observation of a display thereon, is capable of high speed displaying, and easily allows to accomplish a comparatively large screen size.
Especially a PDP of surface discharge type in which display electrodes are arranged on a single substrate in pairs, for voltage application therebetween, is suitable for a color display using fluorescent materials.
FIG. 1 illustrates an exploded, perspective view of a PDP 80 of a prior art, where is shown the structure of a part which corresponds to a single picture element, i.e. a pixel, EG. FIG. 2 is a plane view schematically illustrating an arrangement of the prior art display electrodes.
In prior art PDP 80, each of pixels EG which compose the screen is formed of three sub-pixels EU of R. i.e. red, G, i.e. green & B, i.e. blue, aligned on a line. That is, this arrangement form of the three colors for the color display is a so-called in-line type.
PDP 80 is an AC type PDP of the surface discharge type for allowing the color display, and is composed of front and back glass substrates 11 and 21, a pair of first and second display electrodes Xn & Yn, a dielectric layer 17, a protection film 1, a back glass substrate 21, address electrodes A, separator walls 26, which may be referred to as a separator rib (or a barrier rib), fluorescent layers 28R, 28G & 28B, and a discharge gas enclosed in a discharge space 30 between the front and back glass substrates 11 & 21. Each of first and second display electrodes Xn & Yn is formed of a transparent electrode 41 of a relatively large width and a relatively narrow width metal electrode 42, which may be referred to as a bus electrode, for supplementing the electrical conductivity of the transparent electrode 41. First and second display electrodes Xn & Yn, in a pair, provide the above-mentioned line. Address electrode A extends along a row direction, orthogonal to the line direction, to cross the display electrodes Xn & Yn, and a voltage applied therebetween causes a discharge with respect to the second display electrode Yn in order to control wall charges upon dielectric layer 17 at the crossing point.
Separator walls 26 are straight and parallel when looked down thereat, and are arranged with an equal space measured in the extending direction of display electrodes Xn & Yn, that is, measured in the line direction of the display screen. Discharge space 30 is thus divided by the plural separator walls 26 so as to provide a channel therebetween for each unit display element EU, which is referred to hereinafter as a sub-pixel, divided in the line direction. The height of discharge space 30 is uniform throughout the display area.
Upon an application of a predetermined voltage to between the first and second display electrodes Xn & Yn in pair, an electric discharge takes place therebetween along the surface of dielectric layer 17 at a sub-pixel which has been addressed in the address period, so that fluorescent layer 28R, 28G or 28B in the addressed sub-pixel is excited to emit a light by an ultraviolet ray emitted from the discharge gas.
In the prior art structure shown in FIGS. 1 and 2, the distance d between a second display electrode Yn of one line (n) and the next first display electrode Xn+1 of the next line (n+1) had to be larger than a surface discharge gap g, which is a clearance between the paired display electrodes Xn and Yn, in order prevent an interference between the adjacent lines.
Therefore, there was a problem in that the area of non-luminant region, or portion, in the display screen was relatively large, resulting in a deterioration of the brightness of the whole screen.
There was also a problem in that the discharge in one line was apt to invade, along the row direction, the adjacent line, i.e. to interfere with the adjacent line, resulting in an obscure outline of the sub-pixel.
In addition, due to the sub-pixels EU for each of three colors being aligned on a single line, the width w of each sub-pixel EU measured along the line direction is one third of the pixel pitch ph. Therefore, it was difficult to further decrease the pixel pitch ph.
In order to solve the above problems, there was considered a mesh pattern of the separator walls as disclosed in Japanese Provisional Patent Publication Hei 3-84831. However, because discharge space 30 is divided into each sub-pixel which is divided not only in the line direction but also in the row direction, it was difficult to secure the reliability of the discharge control in driving the cells, and it was also difficult to properly coat the fluorescence layer and to clean up the inside of the divided cells.